Programmable logic devices (PLDs) are a well-known type of programmable integrated circuit (IC) that can be programmed to perform specified logic functions. One type of PLD, the field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles comprise various types of logic blocks, which can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), bus or network interfaces such as Peripheral Component Interconnect Express (PCIe) and Ethernet and so forth.
Each programmable tile typically includes both programmable interconnect and programmable logic. The programmable interconnect typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect and programmable logic are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
PLD providers typically provide “families” of PLDs, which are groups of related PLD products of different sizes. For example, a family of PLDs might all use the same basic tile, but include different numbers of the tiles, so they have different logic capacities. Therefore, a PLD user does not need to pay for a PLD with a much larger capacity than is actually required to implement a particular design. A typical method of generating a family of PLDs is to first manufacture the family member having the greatest anticipated customer demand. Once the first family member has been debugged and characterized and is deemed to meet the product specifications, other family members are manufactured, with each new family member being different from other family members. In order to avoid having to make costly new mask sets for new family members, the same chips have been used for products of different family members. For a product with the greatest capabilities, access to all the circuitry on the chip may be provided for implementing circuit designs. For products provided with lesser capabilities, access to selected circuitry on the chip may be limited.